DS1825U+T&R【PDF 16/21 页】IC THERMOMETER DIGITAL 8-USOP

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DS1825 Programmable Resolution 1-Wire Digital Thermometer With 4-Bit ID

16 of 21

1-Wire SIGNALING

The DS1825 uses a strict 1-Wire communication protocol to insure data integrity. Several signal types are defined

by this protocol: reset pulse, presence pulse, write 0, write 1, read 0, and read 1. All of these signals, with the

exception of the presence pulse, are initiated by the bus master.

INITIALIZATION PROCEDURE: RESET AND PRESENCE PULSES

All communication with the DS1825 begins with an initialization sequence that consists of a reset pulse from the

master followed by a presence pulse from the DS1825. This is illustrated in Figure 13. When the DS1825 sends the

presence pulse in response to the reset, it is indicating to the master that it is on the bus and ready to operate.

During the initialization sequence the bus master transmits (T

) the reset pulse by pulling the 1-Wire bus low for a

minimum of 480ms. The bus master then releases the bus and goes into receive mode (R

). When the bus is

released, the 5k pullup resistor pulls the 1-Wire bus high. When the DS1825 detects this rising edge, it waits 15

60ms and then transmits a presence pulse by pulling the 1-Wire bus low for 60240ms.

Figure 14. INITIALIZATION TIMING

READ/WRITE TIME SLOTS

The bus master writes data to the DS1825 during write time slots and reads data from the DS1825 during read time

slots. One bit of data is transmitted over the 1-Wire bus per time slot.

WRITE TIME SLOTS

There are two types of write time slots: Write 1 time slots and Write 0 time slots. The bus master uses a Write 1

time slot to write a logic 1 to the DS1825 and a Write 0 time slot to write a logic 0 to the DS1825. All write time slots

must be a minimum of 60ms in duration with a minimum of a 1ms recovery time between individual write slots. Both

types of write time slots are initiated by the master pulling the 1-Wire bus low (see Figure 14).

To generate a Write 1 time slot, after pulling the 1-Wire bus low, the bus master must release the 1-Wire bus within

15ms. When the bus is released, the 5k pullup resistor will pull the bus high. To generate a Write 0 time slot, after

pulling the 1-Wire bus low, the bus master must continue to hold the bus low for the duration of the time slot (at

least 60ms).

The DS1825 samples the 1-Wire bus during a window that lasts from 15ms to 60ms after the master initiates the

write time slot. If the bus is high during the sampling window, a 1 is written to the DS1825. If the line is low, a 0 is

written to the DS1825.

LINE TYPE LEGEND

Bus master pulling low

DS1825 pulling low

Resistor ullu

GND

1-WIRE BUS

480 ms minimum

DS1825 T

presence pulse

60-240 ms

MASTER T

RESET PULSE

MASTER R

DS1825

waits 15-60 ms

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